Editing 65816 Overview (section)

= Introduction =
The Western Design Center W65C816 (aka 65C816, 65816, or just 816) is 16-bit upgrade to the 65c02.  By default, it starts up in emulation mode, which is compatible with a WDC 65C02 without the extended Rockwell instructions.  In emulation mode, all registers are 8 bits wide, the zero page is locked to $00xx, the stack is locked to $01xx, and the flags and interrupt vectors behave as expected for a 65c02.  Note that all of the the additional 816 instructions are actually usable in this mode!

Switching to "native" mode, the S register becomes 16 bits wide, the A register can be switched between either 8 or 16 bits wide, X and Y (always together) can be switched between either 8 or 16 bits wide, and the zero page becomes a direct page which may be placed anywhere in the first 64k.  Additionally, the K registers sets the bank used for code, and the B register sets the bank used for extended data transfers.  Note however, that with the standard FPGA load, the upper 8-bits of all 24-bit addresses are treated by the hardware as if they were set to zero.  Finally, interrupts vector to an entirely different set of vectors, making it possible for interrupts to function correctly in either mode.