Memory Management: Difference between revisions
(Created page with "The F256 line comes with 512 KB of RAM and 256 KB of flash memory. Up to 256 KB additional Memory, either RAM or Flash, can be added through the Expansion Port. === Physical Memory Layout === The address bus is 21 bits wide, allowing a total of 2<sup>21</sup> = 2 MB to be addressed. {| class="wikitable" !Address!!Purpose |- |$00:0000 - $07:FFFF||RAM |- |$80:0000 - $0F:FFFF||Flash |- |$10:0000 - $13:FFFF||Expansion Memory |- |$14:0000 - $1F:FFFF||Reserved |}") |
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|$14:0000 - $1F:FFFF||Reserved | |$14:0000 - $1F:FFFF||Reserved | ||
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=== Memory Management Unit (MMU) === | |||
While the address bus is generally 21 bits wide, the CPU address bus of the 65c02 and the FNX6809 is only 16 bits wide. Even though the 65816 does have a 24 bit wide address bus, this is currently not used. However, this might change with a future update. | |||
To allow the addressing of the whole address space, a Memory Management Unit (MMU) is provided, that translates the CPU logical address space to physical addresses. | |||
To achieve this, the MMU has 8 <em>slots</em>, each representing an 8 KB block of the CPU addressable memory space. | |||
The physical address space is also divided into 8 KB blocks, dividing the available 2 MB into 256 blocks. | |||
To <em>map</em> a block of physical addresses into CPU address space, the block number is written into the according slot register of the MMU. | |||
{| class="wikitable" | |||
!Slot!!CPU Address Space!!Slot Register Address | |||
|- | |||
|0||$0000 - $1FFF|| $0008 | |||
|- | |||
|1||$2000 - $3FFF|| $0009 | |||
|- | |||
|2||$4000 - $5FFF|| $000A | |||
|- | |||
|3||$6000 - $7FFF|| $000B | |||
|- | |||
|4||$8000 - $9FFF|| $000C | |||
|- | |||
|5||$A000 - $BFFF|| $000D | |||
|- | |||
|6||$C000 - $DFFF|| $000E | |||
|- | |||
|7||$E000 - $FFFF|| $000F | |||
|} | |||
=== Memory Block Table === | |||
Revision as of 07:16, 23 December 2023
The F256 line comes with 512 KB of RAM and 256 KB of flash memory. Up to 256 KB additional Memory, either RAM or Flash, can be added through the Expansion Port.
Physical Memory Layout
The address bus is 21 bits wide, allowing a total of 221 = 2 MB to be addressed.
| Address | Purpose |
|---|---|
| $00:0000 - $07:FFFF | RAM |
| $80:0000 - $0F:FFFF | Flash |
| $10:0000 - $13:FFFF | Expansion Memory |
| $14:0000 - $1F:FFFF | Reserved |
Memory Management Unit (MMU)
While the address bus is generally 21 bits wide, the CPU address bus of the 65c02 and the FNX6809 is only 16 bits wide. Even though the 65816 does have a 24 bit wide address bus, this is currently not used. However, this might change with a future update.
To allow the addressing of the whole address space, a Memory Management Unit (MMU) is provided, that translates the CPU logical address space to physical addresses.
To achieve this, the MMU has 8 slots, each representing an 8 KB block of the CPU addressable memory space.
The physical address space is also divided into 8 KB blocks, dividing the available 2 MB into 256 blocks.
To map a block of physical addresses into CPU address space, the block number is written into the according slot register of the MMU.
| Slot | CPU Address Space | Slot Register Address |
|---|---|---|
| 0 | $0000 - $1FFF | $0008 |
| 1 | $2000 - $3FFF | $0009 |
| 2 | $4000 - $5FFF | $000A |
| 3 | $6000 - $7FFF | $000B |
| 4 | $8000 - $9FFF | $000C |
| 5 | $A000 - $BFFF | $000D |
| 6 | $C000 - $DFFF | $000E |
| 7 | $E000 - $FFFF | $000F |
