MID codes for machine identification: Difference between revisions
m (→Special case of the F256K2 optical keyboard with a small LCD screen: clarification) |
m (→MID codes for machine identification: more entries added. cpu added. extBit0 added but unsure where you find it in memory) |
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{| class="wikitable"; style="text-align:left;" | {| class="wikitable"; style="text-align:left;" | ||
|- style="vertical-align:top;" | |- style="vertical-align:top;" | ||
!EXT Bit0 | |||
!Bit4 | !Bit4 | ||
!Bit3 | !Bit3 | ||
Line 13: | Line 14: | ||
!Bit0 | !Bit0 | ||
!Regrouped Hex | !Regrouped Hex | ||
!CPU | |||
!Machine | !Machine | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|0 | |0 | ||
Line 21: | Line 24: | ||
|0 | |0 | ||
|0x00 | |0x00 | ||
|65816 | |||
|C256 FMX | |C256 FMX | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|0 | |0 | ||
Line 29: | Line 34: | ||
|1 | |1 | ||
|0x01 | |0x01 | ||
|65816 | |||
|C256 U | |C256 U | ||
|- | |- | ||
|0 | |||
|'''0''' | |||
|'''0''' | |||
|'''0''' | |'''0''' | ||
|'''1''' | |||
|'''0''' | |'''0''' | ||
|'''0x02''' | |||
|'''6502/65816/6809''' | |||
|'''F256 Jr. with classic mmu''' | |||
|- | |||
|'''0''' | |'''0''' | ||
|'''0''' | |||
|'''0''' | |||
|'''0''' | |||
|'''1''' | |||
|'''1''' | |||
|'''0x03''' | |||
|'''65816''' | |||
|'''F256 Jr. extended memory map''' | |||
|- | |||
|'''1''' | |'''1''' | ||
|'''0''' | |'''0''' | ||
|'''0''' | |||
|'''0''' | |||
|'''1''' | |||
|'''1''' | |||
|'''0x02''' | |'''0x02''' | ||
|'''F256 Jr. with classic mmu | |'''65816''' | ||
|'''F256 Jr.Jr. with classic mmu (65816)''' | |||
|- | |- | ||
|'''1''' | |||
|'''0''' | |'''0''' | ||
|'''0''' | |'''0''' | ||
Line 45: | Line 74: | ||
|'''1''' | |'''1''' | ||
|'''0x03''' | |'''0x03''' | ||
|'''F256 Jr. extended memory map''' | |'''65816''' | ||
|'''F256 Jr.Jr. with extended memory map (65816)''' | |||
|- | |- | ||
|'''0''' | |||
|'''1''' | |'''1''' | ||
|'''1''' | |'''1''' | ||
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|'''0''' | |'''0''' | ||
|'''0x1A''' | |'''0x1A''' | ||
|'''6809''' | |||
|'''F256 Jr.Jr. with 6809 core''' | |'''F256 Jr.Jr. with 6809 core''' | ||
|- | |- | ||
|0 | |0 | ||
|0 | |0 | ||
|0 | |0 | ||
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|0 | |0 | ||
|0x04 | |0x04 | ||
|65816 | |||
|Gen X | |Gen X | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|0 | |0 | ||
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|1 | |1 | ||
|0x05 | |0x05 | ||
|C256 U+ | |65816 | ||
|C256 U+ (4M SRAM) | |||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|0 | |0 | ||
Line 85: | Line 114: | ||
|0 | |0 | ||
|0x06 | |0x06 | ||
| | |||
|Reserved | |Reserved | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|0 | |0 | ||
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|1 | |1 | ||
|0x07 | |0x07 | ||
| | |||
|Reserved | |Reserved | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
Line 101: | Line 134: | ||
|0 | |0 | ||
|0x08 | |0x08 | ||
|68xx0xx | |||
|A2560 X (GenX 32Bits Side) | |A2560 X (GenX 32Bits Side) | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
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|1 | |1 | ||
|0x09 | |0x09 | ||
|68EC000 | |||
|A2560 U+ | |A2560 U+ | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
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|0 | |0 | ||
|0x0A | |0x0A | ||
|68LC060 | |||
|A2560 M (launch in 2025) | |A2560 M (launch in 2025) | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
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|1 | |1 | ||
|0x0B | |0x0B | ||
|68040RC25V | |||
|A2560 K (classic) | |A2560 K (classic) | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
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|0 | |0 | ||
|0x0C | |0x0C | ||
|68040FE33V | |||
|A2560 K40 | |A2560 K40 | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
Line 141: | Line 184: | ||
|1 | |1 | ||
|0x0D | |0x0D | ||
|68LC060 | |||
|A2560 K60 | |A2560 K60 | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
Line 149: | Line 194: | ||
|0 | |0 | ||
|0x0E | |0x0E | ||
| | |||
|Undefined | |Undefined | ||
|- | |- | ||
|0 | |||
|0 | |0 | ||
|1 | |1 | ||
Line 157: | Line 204: | ||
|1 | |1 | ||
|0x0F | |0x0F | ||
| | |||
|Undefined | |Undefined | ||
|- | |- | ||
|0 | |||
|1 | |1 | ||
|0 | |0 | ||
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|0 | |0 | ||
|0x10 | |0x10 | ||
|65816 | |||
|F256P (future portable?) | |F256P (future portable?) | ||
|- | |- | ||
|'''0''' | |||
|'''1''' | |'''1''' | ||
|'''0''' | |'''0''' | ||
Line 173: | Line 224: | ||
|'''1''' | |'''1''' | ||
|'''0x11''' | |'''0x11''' | ||
|'''65816''' | |||
|'''F256K2 with classic mmu map''' | |'''F256K2 with classic mmu map''' | ||
|- | |- | ||
|'''0''' | |||
|'''1''' | |'''1''' | ||
|'''0''' | |'''0''' | ||
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|'''0''' | |'''0''' | ||
|'''0x12''' | |'''0x12''' | ||
|'''6502/65816/6809''' | |||
|'''F256K with classic mmu map''' | |'''F256K with classic mmu map''' | ||
|- | |- | ||
|'''0''' | |||
|'''1''' | |'''1''' | ||
|'''0''' | |'''0''' | ||
Line 189: | Line 244: | ||
|'''1''' | |'''1''' | ||
|'''0x13''' | |'''0x13''' | ||
|'''6502/65816''' | |||
|'''F256K with extended map''' | |'''F256K with extended map''' | ||
|- | |- | ||
|'''0''' | |||
|'''1''' | |'''1''' | ||
|'''0''' | |'''0''' | ||
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|'''0''' | |'''0''' | ||
|'''0x14''' | |'''0x14''' | ||
|'''65816''' | |||
|'''F256K2 with extended map''' | |'''F256K2 with extended map''' | ||
|- | |- | ||
|0 | |||
|1 | |||
|0 | |||
|1 | |||
|0 | |||
|1 | |||
|0x15 | |||
| | |||
|Reserved | |||
|- | |||
|'''0''' | |||
|'''1''' | |'''1''' | ||
|'''0''' | |'''0''' | ||
Line 205: | Line 274: | ||
|'''0''' | |'''0''' | ||
|'''0x16''' | |'''0x16''' | ||
|'''6809''' | |||
|'''F256K2 with 6809 core''' | |'''F256K2 with 6809 core''' | ||
|- | |||
|0 | |||
|1 | |||
|0 | |||
|1 | |||
|1 | |||
|1 | |||
|0x17 | |||
| | |||
|Reserved | |||
|} | |} | ||
Revision as of 08:18, 15 February 2025
MID codes for machine identification
These are useful in order to support the different machines within the F256 class of machines, as they don't have the exact same devices, sound options and whatnot. For a detailed list of what is supposed to be available, read on this page on hardware details. Additionally, the specific FPGA core that is currently running will affect the following ID that is found in this table. For completeness, other computers from the Foenix Retro Systems are included, but they are not otherwise covered in this wiki you're currently reading. The current wiki tries to cover the F256Jr., F256K, F256 Jr.Jr. and F256K2. For all other computers mentioned in this table, you can refer to the older wiki found at [| wiki.c256foenix.com].
To get one of the following Machine ID, check the read-only register address of 0xD6A7 and check bits from 0 to 4. Bits 5 to 7 are unused for this process.
EXT Bit0 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | Regrouped Hex | CPU | Machine |
---|---|---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 | 0 | 0x00 | 65816 | C256 FMX |
0 | 0 | 0 | 0 | 0 | 1 | 0x01 | 65816 | C256 U |
0 | 0 | 0 | 0 | 1 | 0 | 0x02 | 6502/65816/6809 | F256 Jr. with classic mmu |
0 | 0 | 0 | 0 | 1 | 1 | 0x03 | 65816 | F256 Jr. extended memory map |
1 | 0 | 0 | 0 | 1 | 1 | 0x02 | 65816 | F256 Jr.Jr. with classic mmu (65816) |
1 | 0 | 0 | 0 | 1 | 1 | 0x03 | 65816 | F256 Jr.Jr. with extended memory map (65816) |
0 | 1 | 1 | 0 | 1 | 0 | 0x1A | 6809 | F256 Jr.Jr. with 6809 core |
0 | 0 | 0 | 1 | 0 | 0 | 0x04 | 65816 | Gen X |
0 | 0 | 0 | 1 | 0 | 1 | 0x05 | 65816 | C256 U+ (4M SRAM) |
0 | 0 | 0 | 1 | 1 | 0 | 0x06 | Reserved | |
0 | 0 | 0 | 1 | 1 | 1 | 0x07 | Reserved | |
0 | 0 | 1 | 0 | 0 | 0 | 0x08 | 68xx0xx | A2560 X (GenX 32Bits Side) |
0 | 0 | 1 | 0 | 0 | 1 | 0x09 | 68EC000 | A2560 U+ |
0 | 0 | 1 | 0 | 1 | 0 | 0x0A | 68LC060 | A2560 M (launch in 2025) |
0 | 0 | 1 | 0 | 1 | 1 | 0x0B | 68040RC25V | A2560 K (classic) |
0 | 0 | 1 | 1 | 0 | 0 | 0x0C | 68040FE33V | A2560 K40 |
0 | 0 | 1 | 1 | 0 | 1 | 0x0D | 68LC060 | A2560 K60 |
0 | 0 | 1 | 1 | 1 | 0 | 0x0E | Undefined | |
0 | 0 | 1 | 1 | 1 | 1 | 0x0F | Undefined | |
0 | 1 | 0 | 0 | 0 | 0 | 0x10 | 65816 | F256P (future portable?) |
0 | 1 | 0 | 0 | 0 | 1 | 0x11 | 65816 | F256K2 with classic mmu map |
0 | 1 | 0 | 0 | 1 | 0 | 0x12 | 6502/65816/6809 | F256K with classic mmu map |
0 | 1 | 0 | 0 | 1 | 1 | 0x13 | 6502/65816 | F256K with extended map |
0 | 1 | 0 | 1 | 0 | 0 | 0x14 | 65816 | F256K2 with extended map |
0 | 1 | 0 | 1 | 0 | 1 | 0x15 | Reserved | |
0 | 1 | 0 | 1 | 1 | 0 | 0x16 | 6809 | F256K2 with 6809 core |
0 | 1 | 0 | 1 | 1 | 1 | 0x17 | Reserved |
Additional registers for machine information
Note that these are all read-only registers.
Address | Name | Description |
---|---|---|
0xD6A8 | PCBID0 | ASCII character 0: "B" |
0xD6A9 | PCBID1 | ASCII character 0: "0" |
0xD6AA | CHSV0 | TinyVicky subversion in BCD (low) |
0xD6AB | CHSV1 | TinyVicky subversion in BCD (high) |
0xD6AC | CHV0 | TinyVicky version in BCD (low) |
0xD6AD | CHV1 | TinyVicky version in BCD (high) |
0xD6AE | CHN0 | TinyVicky number in BCD (low) |
0xD6AF | CHN1 | TinyVicky number in BCD (high) |
0xD6EB | PCBMA | PCB Major Rev (ASCII) |
0xD6EC | PCBMB | PCB Minor Rev (ASCII) |
0xD6ED | PCBD | PCB Day (BCD - Binary Coded Decimal) |
0xD6EE | PCBM | PCB Month (BCD) |
0xD6EF | PCBY | PCB Year (BCD) |
Special case of the F256K2 optical keyboard with a small LCD screen
Since the machine can lock up if you try to access the case-embedded LCD screen found (so far) only on the F256K2 with an optical keyboard, you must test a special bit in order to find whether it is an older style mechanical keyboard, or the newer style optical keyboard. All K2 at release in 2025 and on have them, so for those, testing the machine MID code would be enough. However, there are K2b boards released in late 2024 which were meant to give early access to the K2 machines, but they were meant to be temporarily used in the older F256K cases that have mechanical keyboards. Therefore, this following test must be performed to avoid locking up a machine that would attempt to access a non-present case embedded LCD.
Poll address 0xDDC1 and test bit 1 (second to last least significant bit).
If bit1 is set to 1 (ie 0bxxxxxx1x), the keyboard is mechanical and the embedded LCD is not available.
If bit1 is cleared to 0 (ie 0bxxxxxx0x), the keyboard is optical and the embedded LCD is available.